This is the summary of the course VLSI CAD Part II: Layout from the University of Illinois at Urbana-Champaign. The author of the course is Rob A. Rutenbar. Here’s the summary of the 1st course in the series. Placement Technology mapping Routing Timing Analysis Technology Mapping — transfroming boolean functions/networks into logic gates. Standard Cell Library — a library which contains «standard cells» — logic gates and small logic elements (XOR, NOR, NAND, flip-flop, adder, etc.) Standard Cell can be Читать дальше …
Метка: Coursera
Very Large Scale Integration CAD — Part I — Logic
This is the summary of another course which I’ve passed on Coursera. Its name is VLSI CAD Part I: Logic. The author of the course is Rob A. Rutenbar from the University of Illinois at Urbana-Champaign. The course talks about combinational logic synthesis: logic functions’ minimization, optimizing logic schemes etc. There’s also the 2nd course talking about placement, routing and timing analysis. Shannon Cofactors Fx Fx’ Positional Cube Notation (PCN) Tautology Unate Recursive Paradigm (URP) Unate Recursive Complement Algorithm Binary Читать дальше …